SCCM 2025

The 4th Workshop on Security for Custom Computing Machines (SCCM) will be held in conjunction with FPL 2025.

Interest in hardware security and secure computing systems continues to grow. Recent events have raised awareness of security in general-purpose processors. However, addressing security in custom computing machines is also of high importance, given their increasing use in environments where security and privacy are paramount, including defense, medical, transportation, and communication systems. The SCCM workshop allows researchers in this space to present recent work, discuss current security priorities, and collaborate on future research directions.

Location, Date & Time

Breakoutzaal 1+2. Tuesday, Sep 2nd, 13:30 to 17:30.

Location

CORPUS Congress Centre in Leiden, The Netherlands.

Registration

Register as part of FPL. Be sure to include the Workshops/Tutorials option in your registration.

Organizers

Keynote Speakers

  • Jonathan Graf, Graf Research. “Securing Custom Computing Devices: Observations from the Lab and the Market.” Slides

  • Trevor E. Carlson, National University of Singapore. “Understanding and Exploiting FPGA SoC Components to Compromise System Secrets.”

  • Guy Gogniat, Université Bretagne Sud. “A Fine-Grained Dynamic Partitioning Against Cache-Based Timing Attacks via Cache Locking.” Slides

  • Durga Lakshmi-Ramachandran, Keysight. “Differential Fault Attack on PQC (Dilithium) Implementation for Key Recovery.” Slides

Short Talk Speakers

  • Barbora Hrda, TUM. “CHEQ: Towards Enabling Circuit Integrity Checking in Quantum Controllers.”

  • Zhuoran Liu, Radboud University. “Physical Side-Channel Attacks on Neural Networks Implementations.”

  • Nicolai Müler, Ruhr University Bochum. “Automated Generation and Evaluation of Masked Hardware.”

  • Francesco Regazzoni, USI and University of Amsterdam. “Challenges in Sustainable Security.”

  • Shreejith Shanker, Trinity College Dublin. “Towards Smarter Vehicular Network Interfaces for The Software-Defined Vehicles Era.” Slides

  • Jo Vliegen, ES&S/COSIC, ESAT, KU Leuven, Diepenbeek, Belgium. “FPGA Attestation Through Readback.”