Originally hosted at https://www.fccm.org/past/2019/home/program.
Security for Custom Computing Machines
- Date: Wednesday May 1, 2019
- Time: 8:00 am – 12:15 pm
- Location: CSE 1242
- Organizers: Dustin Richmond (UW) and Ryan Kastner (UCSD)
Hardware security is an important design consideration. Recent events have raised awareness of security in general-purpose processors. As experts we must consider: What are equivalent equivalents for custom computing machines? How do we defend against threats that exist today? How do we design our systems to defend against future threats? This is increasingly important as we deploy custom computing machines at unprecedented scales.
Schedule (Preliminary):
| 8:00 | Introduction |
| 8:15 | Matt French/Josh Monson (ISI) |
| 8:30 | Dustin Richmond (University of Washington) Deploying Sensors in the Datacenter |
| 8:45 | David Kohlbrenner (UC Berkeley) A Threat Model for Deploying Secure Hardware Elements on Untrusted FPGAs |
| 9:00 | Jeff Goeders (BYU) Assurance of Trusted 3rd-Party IP for Modern FPGAs |
| 9:15 | Christophe Bobda (University of Florida) System-Level Design of Secure System on Chip |
| 9:30 | Break-Out Session |
| 10:00 | Coffee Break |
| 10:30 | Alric Althoff (Leidos) Quantifying System-Level Side-Channel Vulnerability |
| 10:45 | Aydin Aysu (NC State) Physical Side-Channels Beyond Cryptography: Searching a New Horizon for Hardware Security |
| 11:00 | Nestan Tsiskaridze (UCSB) Quantifying Arbitration Side Channels in FPGAs |
| 11:15 | Ryan Kastner (UCSD) Security Verification for Heterogeneous Systems |
| 11:30 | Jonathan Valamehr (Tortuga Logic) System-Level Security Verification Starts with the Hardware Root of Trust |
| 11:45 | Break-Out Session |
| 12:15 | Lunch |